UALink is an open standard for connecting AI accelerators inside a pod, built to do the job NVIDIA's proprietary NVLink does. The UALink Consortium published its 200G 1.0 specification in April 2025 and a 2.0 set of specifications in April 2026, and AMD's Helios rack is the first system built around UALink-style scale-up that we could find a vendor page for, as of October 2026.
This guide covers:
- What UALink is, who is behind it, and what the specifications define
- How its published limits compare with NVLink 5 and NVLink 6
- What AMD's Helios rack does with it, and what has not shipped
- What this means if you are renting GPUs today
TL;DR
- UALink and NVLink are both scale-up fabrics: they connect accelerators to each other with memory-style read, write and atomic operations, inside a server or rack. Neither replaces InfiniBand or Ethernet between racks.
- NVLink is proprietary and shipping across generations. UALink is a multi-company standard, with a 1.0 spec from April 2025 and a 2.0 set of specifications from April 2026. The consortium has not disclosed silicon timing in the materials we found.
- The published limits differ in kind: UALink 1.0 targets up to 1,024 accelerators in one pod. NVIDIA lists 72-GPU NVLink domains on its page.
- Verdict: if you rent GPUs today, you rent NVLink. UALink matters for where AMD, and other non-NVIDIA accelerator makers, are heading, and for anyone who wants a multi-vendor alternative to NVIDIA's rack-scale designs.
What UALink is
Ultra Accelerator Link is a specification for communication between accelerators and switches in an AI computing pod. The consortium behind it was announced with a promoter group of AMD, Broadcom, Cisco, Google, HPE, Intel, Meta and Microsoft (May 2024), incorporated in October 2024, and added Alibaba, Apple and Synopsys to its board in January 2025. NVIDIA is not in that promoter list.
What the 200G 1.0 specification, released April 8, 2025, defines, per the consortium's release:
- 200G per lane signaling.
- Up to 1,024 accelerators in a single AI computing pod.
- Accelerator-to-accelerator communication across system nodes using read, write and atomic transactions.
- A consortium claim of 93% effective peak bandwidth. That is a design target stated by the consortium, not a measurement.
- Available to the public (the 2026 release says all specifications can be downloaded from the consortium site).
The release cites more than 85 member companies.
The April 2026 update
On April 7, 2026 the consortium published four specifications. From the consortium's April 7, 2026 news release:
- Common Specification 2.0, which adds in-network compute. The consortium says this reduces latency, saves bandwidth and improves scaling efficiency for distributed training and inference.
- 200G Data Link and Physical Layers 2.0, split out from the common specification so that physical layers and speeds can change without changing the other documents.
- Manageability Specification 1.0, which treats UALink as a system with centralized control and management planes.
- Chiplet Specification 1.0, which defines how to integrate UALink into chiplet-based SoCs (interfaces, form factors, flow control and chiplet management) and is stated to be fully compliant with UCIe 3.0.
What the announcements do not say: when silicon built to the 2.0 documents will ship, or what it will cost. We did not find that disclosed, so we do not state it.
UALink vs NVLink
| UALink | NVLink | |
|---|---|---|
| Owner | UALink Consortium (multi-company) | NVIDIA (proprietary) |
| Openness | Specification downloadable by registration | NVLink Fusion lets partners pair semi-custom chips with NVIDIA technology |
| Scope | Accelerators and switches in a pod | GPUs, and CPUs on superchips, in a server or rack |
| Published scale | Up to 1,024 accelerators per pod (200G 1.0) | 72-GPU domains (NVL72) on NVIDIA's NVLink page |
| Signaling | 200G per lane | NVLink 5: 18 links at 100 GB/s per GPU |
| Per-accelerator bandwidth | Set by how a vendor builds the ports; not a single spec number | 900 GB/s (Hopper), 1,800 GB/s (Blackwell), 3,000 GB/s (Vera Rubin, preliminary) |
| Rack totals | AMD lists 260 TB/s of scale-up bandwidth for a 72-GPU Helios rack | 130 TB/s (GB300 NVL72), 216 TB/s (Vera Rubin NVL72) |
| In-network reduction | In-network compute in the 2.0 common specification | SHARP engines in the NVLink Switch |
| Shipping | Spec published; products through AMD Helios (see below) | Shipping for several generations |
Two cautions on reading this table. First, a spec ceiling is not a product. UALink's 1,024-accelerator figure is what the specification permits, while NVIDIA's 72 is the size of the rack it ships. Second, the bandwidth rows use different accounting (per-lane signaling against per-GPU totals), so we deliberately do not compute a ratio between them.
AMD Helios and UALink over Ethernet
AMD's Helios rack-scale page describes four scale-up cartridges that use UALink over Ethernet (UALoE) to connect up to 72 GPUs, with up to 260 TB/s of aggregate scale-up bandwidth and 31 TB of HBM4 capacity. AMD's technical write-up adds that all 72 GPUs reach each other through 12 UALoE switches across 6 switch trays. Scale-out between racks uses Pensando Vulcano AI NICs at 800 Gbps. AMD's page says the reference design is being shared with partners now, with volume deployments expected in the second half of 2026.
The detail worth noticing is "over Ethernet": Helios carries the UALink protocol on Ethernet physical links, which lets it reuse Ethernet switch silicon. That is AMD's design choice for Helios, and it is separate from the consortium's own 200G physical layer specification. For the GPU side of Helios, see our MI400 and MI450 guide.
AMD also compares Helios to NVIDIA's Vera Rubin NVL72 in its marketing, including claims about tokens per dollar and memory capacity. Those are AMD's claims, partly based on its own simulations, and we do not repeat them as results.
What this means if you rent GPUs
- Today's rentable multi-GPU boxes use NVLink (NVIDIA) or Infinity Fabric (AMD). The MI355X, for instance, connects to peers over seven Infinity Fabric links in an 8-GPU node, not UALink. Check our NVLink guide for what to look for on the NVIDIA side.
- Software portability is the real issue. The collective libraries (NCCL on NVIDIA, RCCL on AMD) are built for their own fabrics. A new fabric needs mature software before it is a practical choice, regardless of the specification quality.
- Rack-scale rentals of UALink-based systems are not something we can point you to yet. We only list live prices for GPUs that are on offer.
Rent today
The practical choice today is between an NVLink-connected NVIDIA node and an Infinity Fabric-connected AMD node. Live on-demand prices:
What's next
Per the consortium's site, UALink will be at the OCP Global Summit (October 12 to 15, 2026, San Jose) and Supercomputing 2026 (November 15 to 20, Chicago). NVIDIA lists NVLink 6 for Vera Rubin at 3,000 GB/s per GPU, preliminary. Whether UALink products reach rentable scale in 2027 is not something any source we found commits to, so we do not guess.
For every datacenter chip on one page, with status, memory and links to each guide, see the datacenter GPU guide.
FAQ
Is UALink a replacement for NVLink?
It targets the same role, scale-up connectivity between accelerators, but as an open multi-company standard. NVIDIA is not among the promoter companies listed by the consortium, and NVIDIA offers NVLink Fusion for partners who want to build with NVLink instead.
How many accelerators does UALink support?
The 200G 1.0 specification supports up to 1,024 accelerators in one AI computing pod, per the consortium's April 2025 release.
Does UALink replace InfiniBand or Ethernet?
No. UALink connects accelerators within a pod. Connecting pods and servers uses a network such as InfiniBand or Ethernet.
Can I rent a UALink system today?
We have not found one on offer. AMD's Helios page says the reference design is being shared with partners and volume deployments are expected in the second half of 2026.
Is UALink faster than NVLink?
There is no like-for-like number. UALink is specified per lane, and NVLink is published per GPU. Compare finished rack systems with measured workloads, not specification lines.
Sources
- UALink Consortium, 200G 1.0 specification news release (April 8, 2025; 1,024 accelerators, 200G per lane, 93% effective peak bandwidth, read/write/atomic): https://ualinkconsortium.org/wp-content/uploads/2025/04/UALink-1.0-Specification-PR_FINAL.pdf
- UALink Consortium, site (four specifications published, board and promoter history, upcoming events): https://ualinkconsortium.org/
- UALink Consortium, April 7, 2026 news release, four specifications: https://ualinkconsortium.org/wp-content/uploads/2026/04/UALink-2.0-Specification-PR_FINAL.pdf
- Phoronix, UALink 200G 1.0 coverage (member count, download terms): https://www.phoronix.com/news/UALink-200G-1.0-Released
- NVIDIA, NVLink and NVLink Switch (per-generation bandwidth, 72-GPU domains, NVLink Fusion, SHARP): https://www.nvidia.com/en-us/data-center/nvlink/
- NVIDIA, GB300 NVL72 (130 TB/s): https://www.nvidia.com/en-us/data-center/gb300-nvl72/
- AMD, Helios rack-scale solution (UALoE, 72 GPUs, 260 TB/s, 31 TB HBM4): https://www.amd.com/en/products/rackscale-solutions/helios.html
- AMD ROCm blog, CDNA 5 and Helios (12 UALoE switches across 6 trays): https://rocm.blogs.amd.com/ecosystems-and-partners/cdna5-helios/README.html
- AMD Instinct MI355X (seven Infinity Fabric links per GPU): https://www.amd.com/en/products/accelerators/instinct/mi350/mi355x.html
