What is a Register File?
The register file is the fastest layer of on-chip memory inside a Streaming Multiprocessor, the place where values actually sit while the GPU cores read and write them between instructions. It runs roughly an order of magnitude faster than the SM's own L1 cache, the same relationship a CPU's registers have to its L1.
Physically, it's a bank of 32-bit registers that gets carved up on demand: a thread can claim one register as a 32-bit integer, pair two together for a 64-bit float, or pack several as smaller 16-bit values. Those physical registers are what back the virtual registers that PTX, CUDA's intermediate representation, assigns to each warp of threads.
A compiler decides at build time how many physical registers each thread in a thread block actually gets. Ask for too many per thread, a state known as high register pressure, and fewer threads fit in the register file at once, which lowers occupancy and leaves the SM with less other work on hand to hide memory latency behind. Register file size varies by GPU generation, one more spec worth checking on the Aquanode GPU pages before assuming a kernel tuned for one architecture will occupy the same fraction of the next.
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See also
Shared Memory
Shared memory is the fast, on-chip pool of memory a CUDA thread block uses to avoid repeatedly hitting slower global memory. The standard load-compute-store pattern it enables, and where bank conflicts come from.
Streaming Multiprocessor
A Streaming Multiprocessor is the closest thing an NVIDIA GPU has to a CPU core, but far simpler and far more numerous. How SMs trade per-thread sophistication for massive parallelism and near-free context switching.
Warp
A warp is a group of 32 threads that a GPU schedules and executes together in lockstep. What warp divergence costs, how warps enable latency hiding, and why they sit outside the official CUDA thread hierarchy.
